Memory devices are typically provided as internal, semiconductor, integrated circuits in computers or other electronic devices. There are many different types of memory including random-access memory (RAM), read only memory (ROM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), and flash memory.
Flash memory devices have developed into a popular source of non-volatile memory for a wide range of electronic applications. Flash memory devices typically use a one-transistor memory cell that allows for high memory densities, high reliability, and low power consumption. Common uses for flash memory include personal computers, personal digital assistants (PDAs), digital cameras, and cellular telephones. Program code and system data such as a basic input/output system (BIOS) are typically stored in flash memory devices for use in personal computer systems.
As the performance and complexity of electronic systems increase, the requirement for additional memory in a system also increases. However, in order to continue to reduce the costs of the system, the parts count must be kept to a minimum. This can be accomplished by increasing the memory density of an integrated circuit.
Memory density can be increased by decreasing the distance between the floating gate cells and by decreasing the size of the cells. Additionally, using multi-level cells (MLC) can increase the amount of data stored in an integrated circuit without adding additional cells and/or increasing the size of the die. The MLC method stores two or more data bits in each memory cell.
MLC requires tight control of the threshold voltages in order to use multiple threshold levels per cell. One problem with non-volatile memory cells that are closely spaced, and MLC in particular, is the floating gate-to-floating gate capacitive coupling causes interference between cells. The interference shifts the threshold voltage of neighboring cells as one cell is programmed. This is referred to as a program disturb condition that may program cells that are not desired to be programmed.
One way that has been used to reduce this problem is to perform lower page (i.e., lower threshold voltage) programming of cells neighboring a first cell prior to upper page programming of any cell. Thus, interference is reduced since the threshold voltage of the affected cell is going to be re-adjusted when the upper page programming is performed. This programming method, however, introduces complexity into the programming process.
For the reasons stated above, and for other reasons stated below that will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need in the art for a less complex method for programming multiple level, non-volatile memory cells while reducing program disturb.